With the consistent advancements in electronic systems, improvement in their functionalities and sophistication, technological experts have witnessed an increasing need for revolutionary type of next generation technologies in memory, particularly to perform different applications involving the concept of Big Data. Combination of frequently growing bandwidth communications, IOT (Internet of Things), 8K broadcasting feature and drastic advancements in Big Data analytics have witnessed explosion of data volumes in different parts of the world.
According to IT experts of any good engineering college in India, total traffic in data centre would expect to reach up to 10.4 ZB by upcoming 2019, which is equal to 10.4 billion terabytes i.e. data would reach to an unprecedented scale. In addition, many data combined with incessant requirement to complete different things within less time as possible. In other words, we are not putting far greater demands on technologies involved in processing of Big Data.
RAM or memory is the most significant component associated with any particular data-handling system, while system designers push the technology of traditional memory to highest possible limits, which is beyond the capability of existing RAM and in turn, causes the feelings of strain. IT experts of Shri Ram Institute of Technology Jabalpur, a leading engineering college in India said that individuals are now moving forward at the fastest possible pace to reach at a point, where conventional type of memory technology will fail to maintain or keep up with modern requirements of data, which indicate for the development of suitable alternative solution.
Limitations of Conventional Memory Technology
In order to discuss about the launch of innovative memory technology, it is essential for us to have a look on certain limitations present in conventional or traditional memory technology.
First big problem with any traditional memory is that it creates a situation, where physically it is impossible to have adequate input-output pins to provide support to a memory bus able to deliver the necessary bandwidth. For instance, in case of wire-line networking, 200Gbps systems require about 700 more pins and 5 DDR4 DIMMs to allow basic functions of data plane memory. On the other side, 400GBps system requires more than 1,100 pins and combination of 8 DDR4 DIMMs. However, it is impossible to increase numbers or counts of input-output pins sufficiently for fulfilling the bandwidth requirements.
Second challenge in memory is associated with power supply. By using conventional forms of memory technologies, individuals have to combine large numbers of components on PCB (Printed Circuit Board) to achieve bandwidth of highest possible range. However, more numbers of components indicate for long traces of PCB to setup connection together and thereby, result in long trace and requirement of more power.
As the requirement of memory power increases, budgets associated with system power level remained at constant for most of the time, while it would shrink in some cases. In this way, factor of power supply compel users to go for the introduction and usage of next generation memory technologies.
Thirdly, usage of conventional memory technology for delivery of highest possible bandwidth typically indicates combining further higher numbers of components on PCB. However, guidelines mentioned in layout of the board put a limit on the ability of designers to pack such components close to each other. This indicates for hitting a point, where it is difficult or impossible to deliver necessary bandwidth by the help of traditional memory and even without any impact on the powering device’s form factor.
What Should New i.e. Upcoming Memory Deliver
Clearly, based on the aforementioned discussions, we should say that the upcoming memory generation should deliver drastic improvements as compared to any conventional technology. It requires delivering highest possible bandwidth as compared to DDR. In addition, the new memory should deliver highest possible bandwidth density, so that it can free up the entire space on PCB to use for other requirements. Along with this, newly introduced memory or RAM should be able to perform in far better way for single watt of power supply.
Technological Options to Resolve the Problem
Until now, experts have come up with development of many new technologies to deal with challenges, while most of them tailor for specific usages. Technologies of LPDDR or Low Power DDR are of highly energy efficient, because of which they could address challenges related to power easily and serve as ideal options for wide range of mobile devices. However, these technologies failed to provide high bandwidth. After this, you will find many technologies, which offer medium-high power of efficiency and bandwidth in medium range. DDR4 and DDR3 remain at lower ends of the available band, while wide IO2 plays major role to stack different memory components at the top portion of any computing element. In this way, technologies discussed here are able to deliver both power efficiency and better bandwidth. Lastly, you will find high-bandwidth solutions, especially HMC i.e. Hybrid Memory Cube, HBM i.e. Hybrid Bandwidth Memory and its successor named HBM2.